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杭州矽力杰笔试.doc

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杭州矽力杰笔试.doc
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IC Design Engineer Test SheetAnalog DesignDevice Knowledge1. p+/n- junction and p-/n+ junction, which has a higher breakdown voltage? Why? For a p+/n- junction having NA and ND, what is the approximate function of junction capacitance (Cj) vs. reverse biased voltage (VR)?2. Draw the cross-section of a CMOS inverter. Draw the parasitic structure on the cross-section. Describe ways to prevent “latch-up”?Circuit Analysis3. See the figure below.a. Draw the bode plot for this circuit.b. Estimate the systematic offset in this amplifier.c. Which is the positive input?VC CRO 2I+-VI NO U TCRO 1W / LM04. See the figure below.a. What is this circuit?b. Which input is the positive input?c. How much current flows in P2?d. If I=10uA, what is a good selection for the value of R?e. What is the Common Mode Input Range for this circuit?f. What is the Common Mode Output Range for this circuit?g. Assume the only capacitance is from OUT to GND. Draw a Bode Plot.h. Assume no load. What is the maximum positive slew rate if COUT=C? What is the maximum negative slew rate?VC CIIP2P3N0N1N2P1P0G N DR R R1 0 / 1 1 0 / 1 1 0 / 1M = 2O U T5. See the figure below.Assume at time=0 inductor current is 0A. Draw inductor current, VX and VOUT vs. time.1 ΩIL1 u HVXVO U TI1 A1 u S 2 u S tI6. See the figure below.a. What is this circuit?b. What is the desired ratio R2/R1?c. How many stable points does this circuit have?d. Assume R1 and R2 have no Temperature Coefficient. Draw a graph of I in R2 vs. Temperature.e. What is the minimum supply voltage necessary for this circuit to work properly?P0P1VO U TVC C1 0 / 1 1 0 / 18 : 1Q0Q1R1R27. See the figure below.a. Write the gain equation of each circuit.b. Assuming VO=0 at time 0. Sketch VO(t) for the given input signal.+-RRA+-CRB+-RCRCtVi n8. Draw Buck Converter Circuit and key waveform, explain the basic operations at steady state.OtherMust Answer (Question 1-3)Question 1:Write the V/I relationship equations for resistor (R), capacitor (C), and inductor (L).Q
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